| Word | Definition |
|---|
| AADL | Architecture Analysis & Design Language |
| ACE | Analog Control Electronics |
| ACSR | Algebra of Communicating Shared Resources |
| ALDERIS | Analysis Language for Distributed, Embedded, and Real-time Systems |
| ANSI | American National Standards Institute |
| ASIC | Application-specific Integrated Circuit |
| BAG | Bandwidth Allocation Gap |
| BCET | Best Case Execution Time |
| BDD | Binary Decision Diagram |
| BE | Best Effort |
| BFT | Byzantine Fault Tolerant |
| BIU | Bus Interface Unit |
| BRAIN | Braided Ring Availability Integrity Network |
| COM | Command |
| COM/MON | Command/Monitor |
| BTL | Backplane Transceiver Logic |
| CPU | Central Processing Unit |
| CRC | Cyclic Redundancy Check |
| CTL | Computation Tree Logic |
| DES | Discrete Event Simulation |
| DE | Discrete Event |
| DREAM | Distributed Real-time Embedded Analysis Method |
| DRE | Distributed Real-time Embedded |
| DSML | Domain-specific Modeling Language |
| ES | End System |
| EDF | Earliest Deadline First |
| EDICT | Error Detection Isolation Containment Types |
| ETB | Evidential Tool Bus |
| FADEC | Full Authority Digital Engine Control |
| FCS | Flight Critical Systems |
| FDIR | Fault Detection, Isolation, and Recovery |
| FIFO | First In First Out |
| FIT | Fault Injection Techniques in the Time-Triggered Architecture |
| FLP | Fischer, Lynch, and Paterson |
| FMEA | Failure Mode and Effects Analysis |
| FSM | Finite State Machine |
| GPC | General Purpose Computer |
| GSPN | Generalized Stochastic Petri Net |
| GUI | Graphical User Interface |
| HPC | High Performance Computing |
| IC | Integrated Circuit |
| IMA | Integrated Modular Avionics |
| ITAR | International Traffic in Arms Regulations |
| ITU | International Telecommunication Union |
| LAN | Local Area Network |
| LLF | Least Laxity First |
| LRM | Line Replaceable Module |
| MAC | Medium Access Control |
| MARTE | Modeling and Analysis of Real-Time and Embedded Systems |
| MDM | Multiplexer Demultiplexer |
| MoC | Model of Computation |
| MON | Monitor |
| MVS | Mid-Value Select |
| NASA | National Aeronautics and Space Administration |
| NIC | Network Interface Controller |
| nMR | n-Modular Redundant |
| OSATE | Open Source AADL Tool Environment |
| PCM | Pulse Code Modulation |
| PE | Processing Element |
| RC | Rate Constrained |
| RMU | Redundancy Management Unit |
| ROBUS | Reliable Optical Bus |
| SAE | Society of Automotive Engineers |
| SAL | Symbolic Analysis Laboratory |
| SCP | Self-checking Pair |
| SoS | Slightly out of Specification |
| SPIDER | Scalable Processor-Independent Design for Enhanced Reliability |
| STS | Space Transportation System |
| TDMA | Time Division Multiple Access |
| TMR | Triple Modular Redundancy |
| TTP/C | Time-triggered Protocol |
| TT | time triggered |
| UML | Unified Modeling Language |
| VL | Virtual Link |
| WCET | Worst Case Execution Time |
| XML | Extensible Markup Language |